Dr. Arijit Mondal

Dr. Arijit Mondal

Asst. Professor


Ph: +91-612-3028161

Fax: +91-612-2277383


Personal webpage: http://www.iitp.ac.in/~arijit/

Research Areas CAD for VLSI, Analog EDA.
Other Interests Photography.
No. of PhD Students

Jaishree Mayank

Pranay Kumar Saha

Fazail Amin
Current Sponsored Projects
TitleChief InvestigatorsSponsored by
Design and FPGA prototyping of multicarrier multiple access schemes for variable rate multimedia satellite communication Dr. Preetam Kumar and Dr. Kailash Chandra Ray
Co-Investigator: Dr. Arijit Mondal
DEIT, Delhi
Publications Journal Publications:
  • Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta, “Symbolic Event Propagation Based Minimal Test Set Generation for Robust Path Delay Faults”, ACM Transactions on Design Automation of Electronic Systems, Volume 17 Issue 4, October 2012. 
  • Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta, “Statistical static timing analysis using symbolic event propagation”,  IET Circuit, Device and Systems, Vol 1, No 4, pages 283-291, 2007.
  • Arijit Mondal, P. P. Chakrabarti, “Reasoning about timing behavior of digital using symbolic event propagation and temporal logic”, IEEE
    Transaction on Computer Aided Design of Integrated Circuits and Systems, Vol 25, No. 9, pages 1973-1814, 2006.

Conference Publications:
  • Jaishree Mayank, Arijit Mondal, "Performance optimization of real timecontrol systems using variable time period". VLSI Design and TestSymposium (VDAT) 2015.
  • Arnab Sarkar, Arijit Mondal, "Partitioned Fair Round Robin: A Fast andAccurate QoS Aware Scheduler for Embedded Systems", Accepted forpublication in VLSI Design Conference (VLSID) 2016.
  • Arijit Mondal, P. P. Chakrabarti and Pallab Dasgupta, “Accelerating Synchronous Sequential Circuits using an Adaptive Clock”, Proceedings of VLSI Design Conference 2010. 
  • Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta, “Timing analysis of sequential circuits using symbolic event propagation”, International Conference on Computing: Theory and Applications, 2007.
  • Diganchal Chakraborty, P. P. Chakrabarti, Arijit Mondal, Pallab Dasgupta, “A framework for estimating peak power in gate level circuits”, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (PATMOS), pages 573-582, 2006 (LNCS).  
  • Arijit Mondal, P. P. Chakrabarti and C. R. Mandal, “A New Approach to Timing Analysis using Event Propagation and Temporal Logic”, Design Automation and Test in Europe (DATE), Paris 2004.