courses:2019:ee512

Writing /home/fac/arijit/public_html/dokuwiki/data/cache/5/5ea36de042c11393bbc835fcba3a9f97.metadata failed
Writing /home/fac/arijit/public_html/dokuwiki/data/cache/0/0f3dae15bd579c4b78137f3d0ad7d105.xhtml failed

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision
Previous revision
Last revision Both sides next revision
courses:2019:ee512 [2019/09/12 15:13]
arijit [Slides]
courses:2019:ee512 [2019/11/20 21:45]
arijit [Slides]
Line 24: Line 24:
   * {{ :courses:2019:ee512:verilog.pdf |Introduction to Verilog}}   * {{ :courses:2019:ee512:verilog.pdf |Introduction to Verilog}}
   * {{ :courses:2019:ee512:08_embeddedprocessor.pdf |Embedded processor}}   * {{ :courses:2019:ee512:08_embeddedprocessor.pdf |Embedded processor}}
 +  * {{ :courses:2019:ee512:09_memory.pdf |Memory}}
 +  * {{ :courses:2019:ee512:10_inputoutput.pdf |Input & Output}}
 +  * {{ :courses:2019:ee512:11_multitasking.pdf |Multitasking}}
 +  * {{ :courses:2019:ee512:12_scheduling.pdf |Scheduling}}
 +  * {{ :courses:2019:ee512:13_verification.pdf |Verification}}
 +  * {{ :courses:2019:ee512:15_quantitative_analysis.pdf |Quantitative analysis}}
      
      
  • courses/2019/ee512.txt
  • Last modified: 2019/11/26 07:30
  • by arijit